1. Field
Embodiments of the invention relate to capacitors and integrated circuit (IC) package assembly, and more specifically, to array capacitors suitable for use with integrated circuits mounted on IC packages.
2. Background
Typically, in integrated circuit (IC) packages such as for mounting IC dies, among other integrated circuitry, a voltage regulator circuit is used to provide electrical power to the semiconductor die. One way of providing voltage regulation to an IC die or chip is mounting a voltage regulator module (VRM) on a printed circuit board (PCB), for example, of a computer system. However, the VRM by itself cannot meet all the power demands of high-speed microelectronic devices (e.g., high performance processors). Specifically, the VRM cannot respond immediately to sudden changes in the current drawn by the die which could generate unacceptably large reductions in voltage, often called voltage droops. This voltage drop on the die increases the switching time of the transistors on the die, which degrades the performance of the system fabricated on the die. To ameliorate excessive voltage droops, decoupling capacitors may be used to assist in preventing a drop in voltage levels in an IC die.
Discrete decoupling capacitors are typically mounted adjacent to the IC die and connected to the conductors that provide power to the die. For a processor die, the die may be mounted on a substrate (e.g., an IC package), and a number of discrete capacitors may be mounted on the substrate along the periphery of the die and/or underneath the die. These capacitors are coupled to the power supply connections at the die through lands formed on the substrate. The capacitors may be used to store energy for use by the die during periods of non-steady state or transient current demands, or to manage noise problems that occur in the die.
One concern associated with power decoupling is inductance in the path from the chip (IC die) to the capacitors. As the chips get faster, it is critical to keep this inductance small in order to manage the high frequency noise. In order to minimize the effective inductance in the path from the chip to the capacitors, the capacitors are typically placed on the backside of the package under the die shadow. In order to accommodate these capacitors, the sockets that are used in microprocessors today have a cavity in the center.
While the capacitors on the package take care of the high frequency noise, they do not have enough capacitance to address the low frequency noise. A significant contribution to the low frequency noise comes from the resistance in the path from the VRM to the chip. This is comprised of the motherboard (MB) resistance, the socket resistance and the package resistance.